Many systems include a processor with intensive memory access during operation of the system. When such systems are developed, a lot of attention usually needs to be given to determine memory usage requirements, e.g. as to memory bandwidth and memory size requirements, to enable a fault-free operation of the system. Hereto, memory trace collection is commonly used to map the memory accesses of the system using different test scenarios representing the system during practical use. Different schemes of memory trace collection are known to obtain a memory trace of a program code executable on a programmable target. Typically, known schemes are adversely affected by hardware limitations, such as trace buffer size or trace data transfer bandwidth, which may e.g. adversely affect the range of scenarios that may be tested and/or which may prevent operation of the programmable target at real-time speed. Prior art systems therefore typically use a memory trace corresponding to very brief period of operation, or use only a partial access trace for a user-selected part of the program code.
For example, publication “METRIC: Memory Tracing via Dynamic Binary Rewriting to Identify Cache Inefficiencies” by Jaydeep Marathe et al in ACM Transactions on Programming Languages and Systems, Volume 29 Issue 2, April 2007 (hereafter briefly referred to as “METRIC”) describes a framework for extracting partial access traces based on dynamic binary rewriting of the executing application. The authors of METRIC instrument memory access instructions to precisely capture the data access stream of the target application, and the user may activate or deactivate tracing so that data reference streams are selectively generated. Partial memory traces may hereby be captured.
METRIC also describes an algorithm for compressing these partial memory traces. The algorithm generates constant space representations for regular accesses occurring in nested loop structures. The algorithm detects, during the execution of the target application, streams of regular accesses generated at a given access point from inspection of the memory accesses performed. METRIC is however capable of and intended for gathering partial access traces, where the overhead of trace compression is limited by the duration of monitoring. In practice, as the authors of METRIC explicitly indicate at the end of section 5, such scheme might only be acceptable as long as the trace collection period is short.
Another method for compressing a complete memory address trace is described in U.S. Pat. No. 6,347,383 B1. U.S. Pat. No. 6,347,383 B1 describes a method and system for compressing an existing trace during post-mortem through detecting and reducing the loops that manifest in an address trace. The method and system described in U.S. Pat. No. 6,347,383 B1 may however require a large trace data transfer bandwidth, as it uses a full existing trace for compression post-mortem.